System for managing circuitry of variable function information processing circuit and method for managing circuitry of variable function information processing circuit

ABSTRACT

Configuration management information having circuit configuration information for altering a circuit configuration of an FPGA ( 12 ) is stored in a memory ( 13 ), the configuration management information according to information related to an instruction group, which is supplied by a configuration management unit ( 11 ) from the outside via a signal line group ( 14 ), is read from the memory ( 13 ), and the circuit configuration of the FPGA ( 12 ) is altered according to the read configuration management information to execute processing of the instruction group so that information processing by software is replaced by information processing by hardware in real time, which increases execution speed of information processing and shortens verification time of software, enabling software development in a shorter period and with higher efficiency.

TECHNICAL FIELD

[0001] The present invention relates to a system for managing aconfiguration of a variable function information processing circuit anda method for managing the configuration of the variable functioninformation processing circuit.

BACKGROUND ART

[0002] Currently, in software development in system development and thelike, extreme majority of manpower and a long period are required. As aresult, even if there is an excellent manufacturing technology formaking parts, a system, and the like with very excellent performance,most of time is occupied by development of software for operating theparts, the system, and the like made by the manufacturing technology,which leads to a situation that a period and the like from manufacturingto commercialization, shipment, delivery, and the like is thoroughlydetermined by quickness of the software development in developing theparts, system, and the like.

[0003] In the overall system development, the fact that the developmentof software of the system requires majority of manpower and time is anextremely critical problem, and it is necessary to shorten the period ofthe software development and increase its efficiency.

[0004] Thus, an object of the present invention is to make it possibleto shorten a period and increase efficiency of software development insystem development.

SUMMARY OF THE INVENTION

[0005] A system for managing a configuration of a variable functioninformation processing circuit of the present invention is a system formanaging a configuration of a variable function information processingcircuit whose circuit configuration is variable according to circuitconfiguration information defining the circuit configuration,characterized in that it comprises: a storage part for storingconfiguration management information having the circuit configurationinformation; an information reading part for reading the configurationmanagement information corresponding to an instruction group describedin a computer language out of configuration management informationstored in the storage part; and a processing executing part for alteringthe circuit configuration of the variable function informationprocessing circuit according to the configuration management informationread from the information reading part, and executing processing of theinstruction group in the variable function information processingcircuit.

[0006] Another form of the system for managing the configuration of thevariable function information processing circuit of the presentinvention is characterized in that the configuration managementinformation further includes input/output control information definingcontrol of an input/output signal in a circuit configuration accordingto the circuit configuration information, and first configurationidentifying information identifying the circuit configurationinformation.

[0007] Still another form of the system for managing the configurationof the variable function information processing circuit of the presentinvention is characterized in that the information reading part readsthe configuration management information corresponding to theinstruction group out of the configuration management information storedin the storage part based on the first configuration identifyinginformation.

[0008] Yet another form of the system for managing the configuration ofthe variable function information processing circuit of the presentinvention is characterized in that the storage part stores, for each ofthe instruction groups, a configuration management information groupcomposed of a plurality of the different configuration managementinformation for each of the instruction groups, and the informationreading part reads configuration management information corresponding toeach of the instruction groups from the storage part.

[0009] Yet another form of the system for managing the configuration ofthe variable function information processing circuit of the presentinvention is characterized in that it further comprises a storage partfor storing configuration sequence information having a configurationidentifying information group grouped by sequencing a plurality of thefirst configuration identifying information and second configurationidentifying information identifying the configuration identifyinginformation group, in which the information reading part readsconfiguration sequence information corresponding to each of theinstruction groups from the storage part, and further reads a pluralityof configuration management information according to sequence based onthe read configuration sequence information.

[0010] Yet another form of the system for managing the configuration ofthe variable function information processing circuit of the presentinvention is characterized in that, every time the configurationmanagement information is read by the information reading part, theprocessing executing part alters the circuit configuration of thevariable function information processing circuit according to the readconfiguration management information, and executes the processing of theinstruction group in the variable function information processingcircuit.

[0011] Yet another form of the system for managing the configuration ofthe variable function information processing circuit of the presentinvention is characterized in that the number of the variable functioninformation processing circuit is one.

[0012] A method for managing a configuration of a variable functioninformation processing circuit of the present invention is a method formanaging a configuration of a variable function information processingcircuit whose circuit configuration is variable according to circuitconfiguration information defining the circuit configuration,characterized in that it comprises: an information reading step ofreading configuration management information having the circuitconfiguration information, which corresponds to an instruction groupdescribed in a computer language, from a storage part in which theconfiguration management information is stored; and a processingexecuting step of altering the circuit configuration of the variablefunction information processing circuit according to the configurationmanagement information read in the information reading step, andexecuting processing of the instruction group.

[0013] Another form of the method for managing the configuration of thevariable function information processing circuit of the presentinvention is characterized in that the configuration managementinformation further includes input/output control information definingcontrol of an input/output signal in a circuit configuration accordingto the circuit configuration information, and first configurationidentifying information identifying the circuit configurationinformation.

[0014] Still another form of the method for managing the configurationof the variable function information processing circuit of the presentinvention is characterized in that, in the information reading step, theconfiguration management information corresponding to the instructiongroup is read from the storage part based on the first configurationidentifying information.

[0015] Yet another form of the method for managing the configuration ofthe variable function information processing circuit of the presentinvention is the method for managing the configuration of the variablefunction information processing circuit whose circuit configuration isvariable according to circuit configuration information defining thecircuit configuration, characterized in that it comprises: aninformation reading step of reading configuration sequence informationcorresponding to an instruction group described in a computer languagefrom a storage part for storing configuration management informationincluding the circuit configuration information, input/output controlinformation defining control of an input/output signal in a circuitconfiguration according to the circuit configuration information, andfirst configuration identifying information identifying the circuitconfiguration information, and the configuration sequence informationincluding a configuration identifying information group which is groupedby sequencing a plurality of the configuration identifying informationand second configuration identifying information identifying theconfiguration identifying information group, and of further reading aplurality of configuration management information according to sequencebased on the read configuration sequence information; and a processingexecuting step of, every time the configuration management informationis read in the information reading step, altering the circuitconfiguration of the variable function information processing circuitaccording to the read configuration management information, andexecuting processing of the instruction group.

[0016] According to the present invention structured as described above,the processing of the instruction group described in the computerlanguage can be replaced by processing by the variable functioninformation processing circuit being hardware in real time as well asthe processing can be executed in a circuit configuration specified tospecifications of a system, which makes it possible to increaseexecution speed of the processing and to shorten verification time ofthe processing of the instruction group which is described in thecomputer language, enabling software development in a shorter period andwith high efficiency.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017]FIG. 1 is a block diagram showing a configuration of a softwareaccelerator to which a system for managing a configuration of a variablefunction information processing circuit according to a first embodimentis applied;

[0018]FIG. 2 is a diagram showing the detailed structure ofconfiguration management information composing a configurationmanagement information group stored in a memory 13;

[0019]FIG. 3 is a diagram showing a configuration management informationgroup 31 stored in the memory 13;

[0020]FIG. 4 is a flow chart showing the processing operation of aconfiguration management unit 11 in the first embodiment;

[0021]FIG. 5 is a diagram showing one configuration example of a systemin which a software accelerator 17 is used by connecting to a computerso that they can communicate with each other;

[0022]FIG. 6A is a diagram showing software 61 stored in a memory 53;

[0023]FIG. 6B is a diagram showing a configuration managementinformation group 62 stored in the memory 13 in the software accelerator17;

[0024]FIG. 7 is a flow chart showing the operation of the system inwhich the software accelerator 17 is connected to the computer so thatthey can communicate with each other in the first embodiment;

[0025]FIG. 8 is a block diagram showing a configuration example of asystem to which a system for managing a configuration of a variablefunction information processing circuit according to a second embodimentis applied;

[0026]FIG. 9 is a diagram showing the detailed structure of oneconfiguration management information in a configuration managementinformation group stored in a memory 13 in a third embodiment; and

[0027]FIG. 10 is a diagram showing a configuration managementinformation group 101 stored in the memory 13 in the third embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] The present invention will be explained in detail by takingexamples below but it is needless to say that the present invention isnot limited to these embodiments. However, characteristics, nature, andvarious benefits of the present invention will be further clarified bythe attached drawings and subsequent detailed explanation of preferredexamples.

[0029] Hereinafter, embodiments of the present invention will beexplained with reference to the drawings.

[0030] First Embodiment

[0031] The structure and operation of a first embodiment of the presentinvention will be explained.

[0032]FIG. 1 is a block diagram showing a configuration of a basic partof a software accelerator 17 to which a system for managing aconfiguration of a variable function information processing circuitaccording to the first embodiment of the present invention is applied.

[0033] In FIG. 1, the software accelerator 17 is composed of aconfiguration management unit 11, an FPGA (Field Programmable GateArray) 12, a memory 13, a signal line group 14 connected to the circuitmanagement unit 11 and the outside (an outer unit and the like notshown) respectively, a signal line group 15 connected to theconfiguration management unit 11 and the FPGA 12 respectively, and asignal line group 16 connected to the configuration management unit 11and the memory 13.

[0034] As the configuration management unit 11, a semiconductorarithmetic circuit may be used or a CPU which operates according topredetermined software supplied to the CPU may be used as long as apredetermined desired configuration management system of the presentinvention is realized.

[0035] The FPGA 12 is one example of a variable function informationprocessing circuit whose circuit configuration is variable, and it isneedless to say that the FPGA or a CPU or a PLD (Programmable LogicDevice) may be used as long as it is an information processing circuitwhose circuit configuration is variable. Further, one FPGA 12 or aplurality of the FPGAs 12 may be provided.

[0036] The memory 13 is one example of a unit for storing aconfiguration management information group, which will be describedlater. Incidentally, it is needless to say that the memory 13 may berealized by, for example, an SRAM, a hard disk, a CD-ROM, a ROM, andother storage units.

[0037]FIG. 2 is a diagram showing the detailed structure ofconfiguration management information composing the configurationmanagement information group which is stored in the memory 13 shown inFIG. 1.

[0038] As shown in FIG. 2, configuration management information 24 iscomposed of circuit configuration information 21, input/output controlinformation 22, and configuration identifying information 23.

[0039] The circuit configuration information 21 is information showing acircuit configuration and a wiring configuration of the FPGA 12, andinformation for changing a function of the FPGA 12. The input/outputcontrol information 22 is information such as a parameter and thesetting value which is necessary for controlling signals of data,instructions, and the like when the signals are inputted/outputted viathe signal line group 15 to/from a function circuit constituted by theFPGA 12 according to the circuit configuration information 21. Theconfiguration identifying information 23 is information used inretrieving specified configuration management information out of aplurality of the configuration management information stored in thememory 13.

[0040] Incidentally, although only the circuit configuration information21, the input/output control information 22, and the configurationidentifying information 23 are used as the configuration managementinformation in the example shown in FIG. 2, additional information suchas, for example, a type of the FPGA may be naturally added other thanthe above information.

[0041]FIG. 3 is a diagram showing a configuration management informationgroup 31 stored in the memory 13.

[0042] In FIG. 3, the configuration management information group 31 iscomposed of first configuration management information 32, secondconfiguration management information 33, and third configurationmanagement information 34, and each of the first to third configurationmanagement information 32 to 34 described above has the circuitconfiguration information 21, the input/output control information 22,and the configuration identifying information 23 as shown in FIG. 2.

[0043] In the configuration management information group 31 stored inthe memory 13, any of the configuration management information 32 to 34composing the configuration management information group 31 can beaccessed from the configuration management unit 11 via the signal linegroup 16, and further, the circuit configuration information 21, theinput/output control information 22, and the configuration identifyinginformation 23 in the configuration management information 32 to 34 canbe also accessed selectively.

[0044] For example, the configuration management unit 11 can access allof the information (the circuit configuration information 21, theinput/output control information 22, and the configuration identifyinginformation 23) in the configuration management information 32 via thesignal line group 16 to read all of the information, and can also accessonly the configuration identifying information 23 in the configurationmanagement information 32 to read only the configuration identifyinginformation 23.

[0045] Further, it is also possible to newly add configurationmanagement information to the configuration management information group31 from the configuration management unit 11 via the signal line group16. However, of course, it is acceptable that new configurationmanagement information cannot be written when a read-only storage unitsuch as the CD-ROM is used as the memory 13.

[0046] Furthermore, when the storage unit such as the CD-ROM is used asthe memory 13, the configuration management information group 31 can beeasily replaced according to the type and the structure of the FPGA 12.The case in which the CD-ROM is used as the memory 13 is explained here,but it is needless to say that, the replacement may be performed via aflexible disk, a network, and the like, not limited to the CD-ROM.

[0047] Incidentally, although the configuration management informationgroup 31 composed of the three configuration management information 32to 34 is shown in FIG. 3, it is natural that the configurationmanagement information group 31 is composed of a plurality of theconfiguration management information and not limited to the threeconfiguration management information. Further, needless to say, thepresent invention is also not limited by the arrangement, sequence, andthe like of the configuration management information in theconfiguration management information group 31.

[0048]FIG. 4 is a flow chart showing the processing operation of theconfiguration management unit 11 in the first embodiment, and theprocessing operation shown in FIG. 4 is one of the basic operationsperformed by the software accelerator 17.

[0049] First, in step S41, desired configuration identifying informationis inputted from the outside (the outer unit and the like not shown) viathe signal line group 14 to the configuration management unit 11.

[0050] In step S42, the configuration management unit 11 compares theconfiguration identifying information inputted from the outside in stepS41 described above with each of the configuration identifyinginformation 23 of the configuration management information which composethe configuration management information group 31 stored in the memory13. As a result, the configuration management unit 11 retrievesconfiguration management information having configuration identifyinginformation which is coincident with the configuration identifyinginformation inputted from the outside, out of the configurationmanagement information composing the configuration managementinformation group 31.

[0051] When the configuration management unit 11 finds the configurationidentifying information coincident with the configuration identifyinginformation inputted from the outside in step S42 described above, theconfiguration management unit 11 reads circuit configuration informationof the configuration management information having the configurationidentifying information in step S43. Further, the configurationmanagement unit 11 inputs the read circuit configuration information tothe FPGA 12 via the signal line group 15 so that the circuitconfiguration of the FPGA 12 is altered and the function of the FPGA 12is changed.

[0052] In step S44, the configuration management unit 11 readsinput/output control information of the configuration managementinformation having the configuration identifying information which iscoincident with the configuration identifying information inputted fromthe outside, and, according to the read input/output controlinformation, outputs a signal inputted from the outside via the signalline group 14 to the FPGA 12 via the signal line group 15. Further, inthis step S44, the configuration management unit 11 also outputs asignal inputted from the FPGA 12 via the signal line group 15 to theoutside via the signal line group 14 according to the read input/outputcontrol information.

[0053] As stated above, the configuration management unit 11 performsthe processing operation shown in FIG. 4 so that it becomes possible toalter the circuit configuration of the FPGA 12 in the softwareaccelerator 17 and change the function thereof only by designating andinputting the configuration identifying information from the outside tothe software accelerator 17 to thereby perform desired data processingin the FPGA 12.

[0054] Here, a data form of the desired configuration identifyinginformation inputted to the configuration management unit 11 from theoutside via the signal line group 14 and a data form of theconfiguration identifying information in the configuration managementinformation stored in the memory 13 need not be always the same as longas certain conversion rules are prescribed in which one of theconfiguration management information stored in the memory 13 correspondsto the configuration identifying information inputted from the outsideto the configuration management unit 11.

[0055]FIG. 5 is a diagram showing one configuration example of a systemin which the software accelerator 17 shown in FIG. 1 is used inconnection to a computer so that it can communicate with the computer.

[0056] In FIG. 5, 52 denotes a CPU, 53 a memory, and 54 a peripheralcircuit, and the software accelerator 17, the CPU 52, the memory 53, andthe peripheral circuit 54 are connected by a signal line group 55 sothat they can communicate with each other.

[0057]FIG. 6A is a diagram showing software 61 which is stored in thememory 53 shown in FIG. 5, and FIG. 6B is a diagram showing aconfiguration management information group 62 stored in the memory 13 inthe software accelerator 17.

[0058] The software 61 shown in FIG. 6A is an instruction groupdescribed in a computer language (for example, the C language and thelike) and composed of, for example, three sequential groupings ofprocessing (processing A63, B64, and C65), and processing is supposed tobe executed in sequence of the processing A63, the processing B64, andthe processing C65.

[0059] Further, the configuration management information group 62 in thesoftware accelerator 17 shown in FIG. 6B is supposed to be composed ofconfiguration management information 66 to 68. Incidentally, it isneedless to say that the number of the configuration managementinformation need not be limited to three and configuration managementinformation irrelevant to the software 61 may be additionally includedother than the three information.

[0060] Here, the processing A63 shown in FIG. 6A is a series ofinstruction group information executed by the CPU 52 shown in FIG. 5,and the configuration management information 66 shown in FIG. 6B isinformation necessary for processing executed in the FPGA 12. ProcessingA executed by the CPU 52 according to the processing A63 and processingexecuted by the FPGA 12 according to the configuration managementinformation 66 should obtain the same result as a consequence ofrespective processing by the CPU 52 and the FPGA 12. Therefore,information for identifying the processing A is contained inconfiguration identifying information in the configuration managementinformation 66.

[0061] Furthermore, similarly, the processing B64 and the configurationmanagement information 67, and, the processing C65 and the configurationmanagement information 68 should obtain the same result as consequenceof respective processing, and information for identifying the processingB and the processing C is contained in configuration identifyinginformation in the configuration management information 67 and 68respectively.

[0062] Here, the operation of the system shown in FIG. 5 will beexplained with reference to a flow chart shown in FIG. 7.

[0063] In the operation as a normal computer, the CPU 52 first reads theprocessing A63 in the software 61 stored in the memory 53 andsequentially executes the series of instruction groups described in theread processing A63.

[0064] Then, the CPU 52 repeats the processing as described above fromthe processing A63 to the processing C65 so that processing with thesoftware 61 is completed.

[0065] On the other hand, when the software accelerator 17 is used, theCPU 52 first reads the processing A63 in the software 61 stored in thememory 53 (S71). Next, the CPU 52 supplies configuration identifyinginformation for retrieving the processing A to the software accelerator17, and the configuration management unit 11 in the software accelerator17 retrieves configuration management information, which has thesupplied configuration identifying information, from the configurationmanagement information group 62 stored in the memory 13 (S72).

[0066] When the configuration management unit 11 in the softwareaccelerator 17 finds the configuration management information having thesupplied configuration identifying information of the processing A, itmeans that the processing can be executed in the software accelerator17. Based on this state, it is determined, for example, statisticallywhether the processing A should be processed in the software accelerator17 or in the CPU 52 by software in consideration of processing timeincluding time for transmitting the circuit configuration informationand data, power consumption, and so on. If it is determined that it isappropriate to execute the processing A in the software accelerator 17,the configuration management unit 11 notifies the CPU 52 that theprocessing A should be processed in the software accelerator 17 (S73).When the CPU 52 is notified from the software accelerator 17 that theprocessing A should be processed in the software accelerator 17, the CPU52 inputs/outputs data to be processed to/from the configurationmanagement unit 11 so that the processing A is executed in the softwareaccelerator 17, not in the CPU 52 (S74).

[0067] On the other hand, if the CPU 52 is notified from the softwareaccelerator 17 that it is not appropriate to execute the processing A inthe software accelerator 17 in step S73, the CPU 52 executes theprocessing A by the software 61 as normally done (S75).

[0068] Subsequently, the similar operation is repeatedly performed alsofor the processing B64 and the processing C65.

[0069] Incidentally, it is needless to say that, here, reading of thesoftware (S71), direction for retrieving (S72), control of the data tobe processed (S74), and the like may be performed not by the CPU 52 butby the configuration management unit 11 in the software accelerator 17,the peripheral circuit 54 shown in FIG. 5, and the like.

[0070] As explained above, according to the first embodiment,information processing by software, which has been conventionallyexecuted in a CPU, can be replaced by information processing by hardwarein real time. Further, in the information processing by hardware, asystem developer can perform information processing in a form specifiedto specifications of a system owing to a circuit design in whicharchitectures such as a parallel characteristic of the processing andthe bus width are considered.

[0071] As a result, execution speed of information processing becomeshigher and verification time, which occupies most of a softwaredevelopment period, can be shortened. Accordingly, the aforesaid firstembodiment can shorten the software development period.

[0072] Second Embodiment

[0073] Next, a second embodiment of the present invention will beexplained.

[0074]FIG. 8 is a block diagram showing a configuration example of asystem to which a system for managing the configuration of the variablefunction information processing circuit according to the secondembodiment of the present invention is applied.

[0075] In FIG. 8, 81 denotes a software accelerator having an internalconfiguration similar to that of the above-described softwareaccelerator 17 shown in FIG. 1. 82 denotes a peripheral circuit composedof an input/output circuit from/to the outside, various controlcircuits, and the like. The software accelerator 81 and the peripheralcircuit 82 are connected by a signal line group 83 so that they cancommunicate with each other.

[0076] A configuration management information group in the softwareaccelerator 81 is composed of the minimum configuration managementinformation necessary for the operation such as configuration managementinformation for controlling the peripheral circuit 82 and for processingdata supplied from the peripheral circuit 82. By preparing only thenecessary amount of the configuration management information asdescribed above, a storage region in the software accelerator 81 can beeffectively utilized without wasting the storage region.

[0077] Further, by using the minimum necessary configuration managementinformation, the FPGA 12 in the software accelerator 81 shifts thefunction (circuit configuration) according to the configurationmanagement information read and supplied from the memory in the softwareaccelerator 81 by a function management unit, which eliminates theconfiguration of a wasteful circuit which is not used at all duringcertain time.

[0078] The similar effect is obtained even in a case in which only oneFPGA 12 is provided in the software accelerator 81. Naturally, thesimilar effect is obtained also when a plurality of the FPGAs 12 areprovided.

[0079] As explained above, according to the second embodiment, inaddition to the effect obtained by the first embodiment, all of theprocessing is executed by hardware so that designing with a high degreeof efficiency can be realized in software development.

[0080] Third Embodiment

[0081] Subsequently, a third embodiment of the present invention will beexplained.

[0082] It should be noted that, in the third embodiment of the presentinvention to be explained below, configurations of a softwareaccelerator and a system using the software accelerator in connection toa computer so that they can communicate with each other are similar tothe configurations shown in FIG. 1 and FIG. 5 respectively, and repeatedexplanations thereof will be omitted.

[0083]FIG. 9 is a diagram showing the detailed structure of one ofconfiguration management information in a configuration managementinformation group stored in the memory 13 in the third embodiment.

[0084] As shown in FIG. 9, configuration management information 91 iscomposed of configuration identifying information 92 and a series ofconfiguration identifying information 93 to 95, and invalid idleinformation 96 is inserted between the configuration identifyinginformation 92 and the configuration identifying information 93 in orderto create the same information (data) form as that of the configurationmanagement information 24 shown in the first embodiment as describedabove.

[0085] Incidentally, although the configuration management information91 having the three configuration identifying information as the seriesof the configuration identifying information 93 to 95 is shown as oneexample in FIG. 9, it is needless to say that the number of the seriesof the configuration identifying information is not limited to three.Further, naturally, additional information such as the type of the FPGAmay be added to the configuration management information 91.

[0086]FIG. 10 is a diagram showing a configuration managementinformation group 101 stored in the memory 13 in the third embodiment.

[0087] In FIG. 10, the configuration management information group 101 iscomposed of first configuration management information 102, secondconfiguration management information 103, third configuration managementinformation 104, and fourth configuration management information 105.The first to third configuration management information 102 to 104described above are the configuration management information similar tothe configuration management information 66 to 68 shown in FIG. 6B inthe aforesaid first embodiment, and repeated explanations thereof willbe omitted.

[0088] The configuration management information 105 allows totalprocessing D executed by processing A to processing C to be registeredas one configuration management information. For example, theconfiguration management information 105 is composed of configurationidentifying information 106 for the processing D, configurationidentifying information 107 for the processing A, configurationidentifying information 108 for the processing B, and configurationidentifying information 109 for the processing C.

[0089] For example, when processing is executed in the FPGA 12 accordingto the configuration management information 105 which defines processingexecuted in sequence of the processing A→the processing B→and theprocessing C as the processing D, the processing is executed in the FPGA12 according to the configuration management information in sequence of“the configuration management information 102 having the configurationidentifying information for the processing A”→“the configurationmanagement information 103 having the configuration identifyinginformation for the processing B”→“the configuration managementinformation 104 having the configuration identifying information for theprocessing C”. In other words, when the configuration identifyinginformation 106 for the processing D is inputted from the outside to theconfiguration management unit 11, the configuration management unit 11retrieves and reads the configuration management information 105 havingthe configuration identifying information 106 for the processing D.Then, the configuration management unit 11 sequentially retrieves andreads the first to third configuration management information 102 to 104having the configuration identifying information 107 for the processingA, the configuration identifying information 108 for the processing B,and the configuration identifying information 109 for the processing C,which are described in the read configuration management information105, and executes the processing in the FPGA 12 according to the firstto third configuration management information 102 to 104.

[0090] As explained above, according to the third embodiment, since aplurality of configuration management information is called accordingto-the configuration management information, a plurality of small-scaleprocessing are grouped into large-scale processing, and therefore, forexample, a plurality of processing which are constantly performed inpredetermined sequence can be handled as one processing, which enablesthe system developer to perform development easily, and to shorten thesoftware development period.

[0091] Incidentally, although the configuration management informationgroup 101 stored in the memory is composed of the four configurationmanagement information 102 to 105 in FIG. 10, it is needless to say thatthe configuration management information group 101 is composed of aplurality of the configuration management information and not limited tothe four configuration management information.

INDUSTRIAL APPLICABILITY

[0092] As described above, according to the present invention,information processing by software, which has been conventionallyperformed by successively executing an instruction group in a CPU, isreplaced by information processing by hardware in real time, and itbecomes possible to execute information processing using the hardware,and further to execute information processing using a circuitconfiguration of the hardware specified to development specifications sothat execution speed of the information processing can be made higherand verification time of developed software can be shortened.Accordingly, it will become possible to shorten a software developmentperiod and to design software with a high degree of efficiency.

What is claimed is:
 1. A system for managing a configuration of avariable function information processing circuit, whose circuitconfiguration is variable, according to circuit configurationinformation defining the circuit configuration, comprising: a storagepart for storing configuration management information having the circuitconfiguration information; an information reading part for reading theconfiguration management information corresponding to an instructiongroup described in a computer language out of configuration managementinformation stored in said storage part; and a processing executing partfor altering the circuit configuration of the variable functioninformation processing circuit according to the configuration managementinformation read from said information reading part, and executingprocessing of the instruction group in the variable function informationprocessing circuit.
 2. The system for managing the configuration of thevariable function information processing circuit according to claim 1,wherein the configuration management information further includesinput/output control information defining control of an input/outputsignal in a circuit configuration according to the circuit configurationinformation, and first configuration identifying information identifyingthe circuit configuration information.
 3. The system for managing theconfiguration of the variable function information processing circuitaccording to claim 2, wherein said information reading part reads theconfiguration management information corresponding to the instructiongroup out of the configuration management information stored in saidstorage part based on the first configuration identifying information.4. The system for managing the configuration of the variable functioninformation processing circuit according to claim 2, wherein saidstorage part stores, for each of the command groups, a configurationmanagement information group composed of a plurality of the differentconfiguration management information for each of the instruction groups,and wherein said information reading part reads configuration managementinformation corresponding to each of the instruction groups from saidstorage part.
 5. The system for managing the configuration of thevariable function information processing circuit according to claim 2,further comprising a storage part for storing configuration sequenceinformation having a configuration identifying information group groupedby sequencing a plurality of the first configuration identifyinginformation and second configuration identifying information identifyingthe configuration identifying information group, wherein saidinformation reading part reads configuration sequence informationcorresponding to each of the instruction groups from said storage part,and further reads a plurality of configuration management informationaccording to sequence based on the read configuration sequenceinformation.
 6. The system for managing the configuration of thevariable function information processing circuit according to claim 5,wherein, every time the configuration management information is read bysaid information reading part, said processing executing part alters thecircuit configuration of the variable function information processingcircuit according to the read configuration management information, andexecutes the processing of the instruction group in the variablefunction information processing circuit.
 7. The system for managing theconfiguration of the variable function information processing circuitaccording to claim 1, wherein the number of the variable functioninformation processing circuit is one.
 8. A method for managing aconfiguration of a variable function information processing circuitwhose circuit configuration is variable according to circuitconfiguration information defining the circuit configuration,comprising: an information reading step of reading configurationmanagement information having the circuit configuration information,which corresponds to an instruction group described in a computerlanguage, from a storage part in which the configuration managementinformation is stored; and a processing executing step of altering thecircuit configuration of the variable function information processingcircuit according to the configuration management information read insaid information reading step, and executing processing of theinstruction group.
 9. The method for managing the configuration of thevariable function information processing circuit according to claim 8,wherein the configuration management information further includesinput/output control information defining control of an input/outputsignal in a circuit configuration according to the circuit configurationinformation, and first configuration identifying information identifyingthe circuit configuration information.
 10. The method for managing theconfiguration of the variable function information processing circuitaccording to claim 9, wherein, in said information reading step, theconfiguration management information corresponding to the instructiongroup is read from the storage part based on the first configurationidentifying information.
 11. A method for managing a configuration of avariable function information processing circuit whose circuitconfiguration is variable according to circuit configuration informationdefining the circuit configuration, comprising: an information readingstep of reading configuration sequence information corresponding to aninstruction group described in a computer language from a storage partfor storing configuration management information including the circuitconfiguration information, input/output control information definingcontrol of an input/output signal in a circuit configuration accordingto the circuit configuration information, and first configurationidentifying information identifying the circuit configurationinformation, and the configuration sequence information including aconfiguration identifying information group which is grouped bysequencing a plurality of the configuration identifying information andsecond configuration identifying information identifying theconfiguration identifying information group, and of further reading aplurality of configuration management information according to sequencebased on the read configuration sequence information; and a processingexecuting step of, every time the configuration management informationis read in said information reading step, altering the circuitconfiguration of the variable function information processing circuitaccording to the read configuration management information, andexecuting processing of the instruction group.